As device dimensions get smaller, and device density increases, it becomes more and more difficult to build an efficient and reliable isolation process to separate active devices. The main drawback with the conventional LOCal Oxidation of Silicon (LOCOS), is the existence of a long "bird's beak" length or oxide encroachment into the active device region of the substrate which limits usable active device area.
The limits of the standard LOCOS process have motivated the search for, and the development of new isolation schemes. Poly Buffered LOCOS (PBL) employs a thin polysilicon layer between the oxide and nitride films in the LOCOS stack.
PBL facilitates design rule shrinking and smaller cell size required for submicron and sub-half-micron device fabrication. This isolation scheme utilizes an oxide/poly/nitride sandwich to block oxidation of the active regions during field oxidation growth. The presence of the intermediate poly layer allows the oxide to be thinned and nitride thickened without generating undue stress in the active regions in order to reduce encroachment during the field oxidation step.
Unfortunately, in standard poly buffered LOCOS processing, the substrate has been found to pit after the pad oxide has been stripped. The pitting becomes more severe as the active area dimensions are reduced to the submicron regime. This "pitting" phenomenon is discussed in "Poly-void Formation in Poly Buffer LOCOS Process," by H. S. Yang, et al., and also in "Twin-White-Ribbon Effect and Pit Formation Mechanism in PBLOCOS," by Tin-hwang Lin, et al.
In the isolation process, once the field oxide has been grown, the nitride and polysilicon layers are removed over the active area regions. It is during the removal process of the polysilicon layer when pitting of the active areas occurs due to exposure of the substrate to the etchants used for removing the polysilicon layer. As a result the exposed substrate becomes "pitted" by the etchant chemicals.